TC-8 Samples

First consider simple examples, without any branching:

tens.tig

10 + 20 * 30

tc -I tens.tig

$ tc -I tens.tig
# == Final assembler ouput. == #
# Routine: _main
tc_main:
# Allocate frame
	move	$x13, $ra
	move	$x5, $s0
	move	$x6, $s1
	move	$x7, $s2
	move	$x8, $s3
	move	$x9, $s4
	move	$x10, $s5
	move	$x11, $s6
	move	$x12, $s7
l0:
	li	$x1, 10
	li	$x2, 20
	mul	$x3, $x2, 30
	add	$x4, $x1, $x3
l1:
	move	$s0, $x5
	move	$s1, $x6
	move	$s2, $x7
	move	$s3, $x8
	move	$s4, $x9
	move	$s5, $x10
	move	$s6, $x11
	move	$s7, $x12
	move	$ra, $x13
# Deallocate frame
	jr	$ra
$ echo $?
0

tc -FVN tens.tig

$ tc -FVN tens.tig

$ echo $?
0

tens.main._main.flow.gv

tens.main._main.liveness.gv

tens.main._main.interference.gv

But as you can see, the result is quite hairy, and unreadable, especially for interference graphs:

• the callee save registers ($s0 to $s7 on Mips) collide with every other temporary.

• the callee save registers have to be… saved, which doubles the number of Temp.

To circumvent this problem, use --callee-save to limit the number of such registers.

hundreds.tig

100 + 200 * 300

tc --callee-save=0 -VN hundreds.tig

$ tc --callee-save=0 -VN hundreds.tig

$ echo $?
0

hundreds.main._main.liveness.gv

hundreds.main._main.interference.gv

Branching is of course a most interesting feature to exercise.

ors.tig

1 | 2 | 3

tc --callee-save=0 -I ors.tig

$ tc --callee-save=0 -I ors.tig
# == Final assembler ouput. == #
# Routine: _main
tc_main:
# Allocate frame
	move	$x4, $ra
l5:
	li	$x1, 1
	bne	$x1, 0, l3
l4:
	li	$x2, 2
	bne	$x2, 0, l0
l1:
l2:
	j	l6
l0:
	j	l2
l3:
	li	$x3, 1
	bne	$x3, 0, l0
l7:
	j	l1
l6:
	move	$ra, $x4
# Deallocate frame
	jr	$ra
$ echo $?
0

tc -FVN ors.tig

$ tc -FVN ors.tig

$ echo $?
0

ors.main._main.flow.gv

ors.main._main.liveness.gv

ors.main._main.interference.gv